NTSC Question / 6845 CRTC Registers

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Hiya folks.  I got all interested in project building last summer,
only for winter to roll around and put a damper on my soldering
(couldn't open the windows), so I pretty much fell out of the
electronics mood for quite a while.  But that urge to build has
returned, and I'm back with idears on things I want to try and get
back to making my own little computer!

I'm still really interested in being able to generate my own NTSC
signal, and having poured over more documents on the subject again
this summer, I think I'm pretty close to another attempt.
Particularly since I've ordered a new microcontroller to try with,
since my PIC I was attempting it on died last summer.  But this time
it's a 8052 variant, which I think I've fallen in love with due to the
fact it can have both an externally accessible address/data bus as
well as still have the all-in-one charm of a PIC.  This one is also
capable of one machine cycle per clock, as long as you stick to using
the internal flash/sram.

Anyhoo, I'd just like to try this signal generation manually first, in
black and white, pumping out the sync and levels myself.  Only
downside is the amount of misinformation on the internet.  It would
seem that some say the sync pulse is about -0.4v, blanking around 0v,
black around 0.3v, and white at 1v.  Other people say sync can be 0v,
blanking/black 0.3v, and white 1v.  I've also seen sync at 0, blanking
0.3, black 0.4, white 1, etc etc.  I mean, does it really matter that
much?  Could I get by with just using 0, 0.3, and 1?  I really don't
want to have to try and start getting a negative voltage if avoidable,
since to be honest, I'm not entirely sure how I'd do it at the
moment.  Televisions seem like they're fairly lenient, and with all
the methods out there I've seen, I would assume most/all of them work,
albeit possibly with less quality in some respect.  I also found some
clashing information on sending vertical sync, with some saying it's
okay to just send repeating inverted sync pulses the whole time (and
for the whole line, instead of doubles) to get back to the top instead
of surrounding it with equalizing pulses.

Aside from doing it the raw way, I also want to try using a 6845 I
ordered last year to generate video.  I think I've wrapped my head
around how it works fairly well, but after looking at CGA register
values, I found myself confused.  It seems that if you're going to run
in either 320x200 or 640x200 graphics modes, you don't set the number
of vertically displayed rows to 200 as one might think, but 100
instead.  I don't understand this, or how the screen would then be
displayed properly, since it seemingly is only doing half the screen.
As far as I know, CGA doesn't ever interlace the actual screen,
despite the graphics memory being laid out interlaced (which I'm sure
is related to this somehow).  If anyone can shed any light on this for
me, I'd sure appreciate it!

Re: NTSC Question / 6845 CRTC Registers

FyberOptic wrote:
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Well, as someone who worked in television broadcasting/CCTV of various
sorts for decades I can confirm that "NTSC levels" are sometimes
ambiguous, especially when one gets away from real studio equipment and
into home/amateur types. Computers bring a new level of confusion to
levels. Basically, if it isn't 1V p-p and the video/sync ratio isn't
100/40 then in doesn't stand a chance of being "real" NTSC.

This page shows pretty much everything you might want to know about NTSC
levels. It is from Tektronix and you can take it as gospel:

That URL will have broken badly but I'll leave it for you to put back
together. Or just go to google and search for "NTSC levels" and choose
the tek link.

I haven't designed with an MC6845 for a _very_ long time (before 1980
for sure)and can't contribute anything useful after all this time.

John McGaw
[Knoxville, TN, USA]

Re: NTSC Question / 6845 CRTC Registers

John McGaw wrote:
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This article tells you how to use an emitter follower configured
transistor, to convert logic level signals, into something suitable
for driving a 75 ohm coax at video levels. As near as I can tell, this
circuit cannot swing below ground, and probably relies on "DC restoration"
in the TV, to get the levels where they should be. Note the simple resistor
summing scheme, to combine RGBS to make a single signal. That summing
scheme is how you could combine a composite sync or separate sync
signals, with your video signal. Note that the signals need to have the
correct polarity, for things to sum the correct way. (Sometimes, you
need a CMOS inverter, to invert the signal, and also give it a rail to
rail logic swing.)


I built something like you are trying to do, back in the early 80's,
with one of these. SMC CRT5037 family. This thing is so old, it is a
dual rail chip. They might have used dual rails, to give 12V to run
the high speed circuitry, while using 5V to generate standard CMOS
logic levels on their output pins. There was a time, when CMOS could
be run from high voltages, like 15 volts.

CRT5037 datasheet - looking just as bad as the paper xerox copy I got :-)


Re: NTSC Question / 6845 CRTC Registers

Paul wrote:
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In terms of the signal swing issue, this Conexant TV encoder chip is
powered by 3.3V and GND, and has no negative power rail. To me that
implies that the sync tips will be a 0 volts, black will be at +0.330V
and white would be more positive than that. They don't show how to build a
driver (since the chip has a driver capable of driving a doubly
terminated transmission line to begin with), but at least this is an
example of driving a compliant output signal without a negative going

Pg 136 and others... Doc also makes passing reference to some standards.


Re: NTSC Question / 6845 CRTC Registers

finger to keyboard and composed:

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AFAICS, your output doesn't need to swing below zero because the
inputs of AV devices are capacitively coupled.

- Franc Zabkar
Please remove one 'i' from my address when replying by email.

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