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- PCI space saver
November 5, 2006, 4:34 pm
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Re: PCI space saver
There are some examples here. Some riser assemblies are for
specific kinds of reduced profile cases. The ribbon cable
assembly shown here, makes me nervous (may not be a good
impedance match for the rest of the PCI bus). The PCB based
assemblies are easier to engineer for correct operation.
This one is a little different looking. The wafer cards plug into
a couple of PCI slots, and one function of the wafer card, is
to pick up enough power to run the PCI cards in the riser. This
is not normally an issue for "single chip" PCI cards, like
Ethernet, USB, Firewire and the like, as they don't draw that
much current. But for some special function, high power PCI
cards, the wafer plug-ins are a good idea.
From a technical perspective, one thing I don't understand is
how the PCI card IDSEL signal is being generated on the riser.
(PCI standard - only if you need reference reading material)
(Intel motherboard schematic)
On PDF pages 44-48 of the Intel doc, are shown PCI slot wiring.
The IDSEL on page 44 is wired to bus bit 20. On page 43 it is
wired to bus bit 19. And so on. During a configuration cycle,
each slot is given a unique address. When using a riser assembly,
what you would not want, is the choice of IDSEL wiring to conflict
with the choices made on the motherboard. For example, if the
motherboard has a PCI Ethernet chip on it, a particular choice
may have been made for the IDSEL wiring for the Ethernet chip.
You would not want the riser to make the same choice as the
Ethernet chip. And plugging the riser into a PCI slot, does not
imply that the PCI slot wiring choice is transferred to the riser.
(AFAIK, this doesn't affect actual usage cycles - I think once
configuration is finished, the card responds according to the
PCI Base Address Register or PCI_BAR set in the PCI card's logic
chip. But having two PCI cards respond to the same configuration
cycle, doesn't strike me as being healthy.)
Other than the details of IDSEL, about the only other issue, is
whether a PCI riser is changing the bus timing. There is a limit
to how long the PCI bus can be (this can be established by analog
simulation, using real models for chips soldered to the motherboard),
and the riser assembly will cause reflections not covered in the
PCI development work. I don't know if riser assemblies are covered
by any standards or not. Risers do seem to be popular for server
assemblies, so they must work :-)
Using the search box on the first link, and entering "riser", can
bring up forum messages discussing the effects of riser cards on