CL5 and e6x50s

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Is there any truth to the tomshardware statement that e6x50s core duos
work in X38 only with CL4
and quicker 667 mhz dimms?

I got a CL5 unbuffered ecc kingston dimms and, naturally, i want a
e6750 :)

Re: CL5 and e6x50s wrote:
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Try a motherboard manual as a source of information. This is an X38 motherboard.

PDF page 41 (section 2.4.2) says:

    "Due to chipset limitations, DDR2-800 with CL=4 will be downgraded to run
     at DDR2-667 by default setting. If you want to operate with lower latency,
     adjust the memory timing manually."

In other words, a visit to the BIOS, and you can do anything you want (via manual
settings if necessary).

And for once, I checked the Intel X38 datasheet, and there is no mention in
there, of any restrictions on CAS. Usually, a cryptic statement in the
motherboard manual, like the statement above, is matched by a cryptic statement
in the Intel datasheet, but I cannot find one in the Intel datasheet in this


Re: CL5 and e6x50s

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i wonder where did tomshardware pulled that data from then.
it does not seem to be very characteristic of them to spread lies

Re: CL5 and e6x50s wrote:
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Could you provide a URL to the tomshardware statement ?

If you think about it, imagine the consequences if a chipset does not
work with industry standard timing DIMMs. Imagine all the Tech Support
phone calls for any motherboard manufacturer. Having such a restriction
would not be very bright. If the restriction really existed, I think
most motherboard makers would tell Intel to redesign the chip.

Another thing to remember, is X38 motherboards are brand new. For
any motherboard, the BIOS takes roughly five releases before it
is reasonably stable, well adjusted, and supports most RAM out of
the box. So three months from now, we'll be in a better position
to judge the goodness of the X38 products.

I could understand a comment about certain kinds of RAM not working,
if the BIOS needed more work. But as for the chipset itself, preventing
standard RAM from being used, is not a good strategy.


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